Technology Foundation

Standard Cell

  • Over 10 Standard cell Libraries (SD, HP, SHP)
  • Developed in (180nm to 10nm)


  • GPIO Libraries in 16/28/45/65nm
  • ESD, latch up, Off-chip issues
  • Signal Integrity & On-Chip IO ring issues
  • PDF

  • Standard Cell

  • Memory

  • IO

  • IP Migration and Test Chip


  • Established PDK Development
  • Qualified PDKs for various Fabs
  • PDK Kits (40nm to 14nm)


  • SRAM design and layout of Standard/Customized Memories
  • Experience from 90nm to 10nm

IP Migration

  • Power management, Data Converters, Clock Circuits, SerDes & PHYs customized/ ported across Tech Nodes & Fabs