Standard Cell
- Over 10 Standard cell Libraries (SD, HP, SHP)
- Developed in (180nm to 10nm)
IO
- GPIO Libraries in 16/28/45/65nm
- ESD, latch up, Off-chip issues
- Signal Integrity & On-Chip IO ring issues
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PDF
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Standard Cell
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Memory
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IO
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IP Migration and Test Chip
PDK
- Established PDK Development
- Qualified PDKs for various Fabs
- PDK Kits (40nm to 14nm)
Memory
- SRAM design and layout of Standard/Customized Memories
- Experience from 90nm to 10nm
IP Migration
- Power management, Data Converters, Clock Circuits, SerDes & PHYs customized/ ported across Tech Nodes & Fabs